Renesas SH7641 - Manual (Page 278)

Section 10 Interrupt Controller (INTC)
Rev. 4.00 Sep. 14, 2005 Page 228 of 982
REJ09B0023-0400
10.3.5 Interrupt Request Register 0 (IRR0)
IRR0 is an 8-bit register that indicates interrupt requests from external input pins
IRQ7 to IRQ0.
This register is initialized to H'00 by a power-on reset or manual reset, but is not initialized in
standby mode.
Bit Bit Name
Initial
Value R/W
Description
7
6
5
4
3
2
1
0
IRQ7R
IRQ6R
IRQ5R
IRQ4R
IRQ3R
IRQ2R
IRQ1R
IRQ0R
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IRQn Interrupt Request
Indicates whether there is interrupt request input to the
IRQn pin. When edge-detection mode is set for IRQn,
an interrupt request is cleared by writing 0 to the IRQnR
bit after reading IRQnR = 1.
When level-detection mode is set for
IRQn, an interrupt
request is set/cleared by only 1/0 input to the IRQn pin.
IRQnR
0: No interrupt request input to
IRQn pin
1: Interrupt request input to
IRQn pin
n = 0 to 7