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4 usb interrupt select register 0 (usbisr0) – Renesas SH7641 User Manual

Page 803

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Section 20 USB Function Module

Rev. 4.00 Sep. 14, 2005 Page 753 of 982

REJ09B0023-0400

Bit Bit

Name

Initial
Value R/W Description

1 CFGV

0 R

Configuration

Value

Status bit for monitoring the configuration value. This is
a status bit and cannot be cleared.

0

SETC

0

R/W

SET_CONFIGURATION Request Detection

This bit is set to 1 when the SET_CONFIGURATION
request is received.

20.3.4

USB Interrupt Select Register 0 (USBISR0)

USBISR0 selects the vector numbers of the interrupt requests indicated in USB interrupt flag
register 0 (USBIFR0). If the USB issues an interrupt request to the INTC when the corresponding
bit in USBISR0 is cleared to 0, the interrupt will be USI0 (USB interrupt 0). If the USB issues an
interrupt request to the INTC when the corresponding bit in USBISR0 is set to 1, the interrupt will
be USI1 (USB interrupt 1). If interrupts occur simultaneously, USI0 has priority by default.

USBISR0 is initialized to H'00 by a power-on reset.

Bit Bit

Name

Initial
Value R/W

Description

7 BRST

0 R/W

Bus

reset

6 EP1FULL

0 R/W

EP1FIFO

full

5

EP2TR

0

R/W EP2 transfer request

4

EP2EMPTY 0

R/W EP2 FIFO empty

3

SETUPTS

0

R/W Setup command receive completion

2 EP0oTS

0 R/W

EPOo

receive

completion

1

EP0iTR

0

R/W EPOi transfer request

0

EP0iTS

0

R/W EPOi transmit completion

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