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6 usage notes, 1 setting analog input voltage, 2 processing of analog input pins – Renesas SH7641 User Manual

Page 865: 3 permissible signal source impedance

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Section 21 A/D Converter

Rev. 4.00 Sep. 14, 2005 Page 815 of 982

REJ09B0023-0400

21.6 Usage

Notes

When using the A/D converter, note the following points.

21.6.1

Setting Analog Input Voltage

Permanent damage to the LSI may result if the following voltage ranges are exceeded.

1. Analog input range: During A/D conversion, voltages on the analog input pins ANn should not

go beyond the following range: AVss

≤ ANn ≤ AVcc (n = 0 to 7).

2. AVcc and AVss input voltages: Input voltages AVcc and AVss should be VccQ

− 0.2 V ≤

AVcc

≤ VccQ and AVss = Vss. Do not leave the AVcc and AVss pins open when the A/D

converter is not in use and during periods in standby mode; in these situations, connect AVcc
to the power supply (VccQ) and AVss to the ground (VssQ).

21.6.2

Processing of Analog Input Pins

To prevent damage from voltage surges at the analog input pins (AN0 to AN7), connect an input
protection circuit like the one shown in figure 21.7. The circuit shown also includes an RC filter to
suppress noise. This circuit is shown as an example; the circuit constants should be selected
according to actual application conditions. Section 25.4, A/D Converter Characteristics in section
25, Electrical Characteristics shows the analog input pin specifications and figure 21.8 shows an
equivalent circuit diagram of the analog input ports.

21.6.3 Permissible

Signal Source Impedance

This LSI's analog input is designed such that conversion precision is guaranteed for an input signal
for which the signal source impedance is 5k

Ω or less. This specification is provided to enable the

A/D converter's sample-and-hold circuit input capacitance to be charged within the sampling time;
if the sensor output impedance exceeds 5k

Ω, charging may be insufficient and it may not be

possible to guarantee A/D conversion precision. However, for A/D conversion in single mode with
a large capacitance provided externally for A/D conversion in single mode, the input load will
essentially comprise only the internal input resistance of 3k

Ω, and the signal source impedance is

ignored. However, as a low-pass filter effect is obtained in this case, it may not be possible to
follow an analog signal with a large differential coefficient (e.g., 5mV/

µs or greater) (see

figure 21.9). When converting a high-speed analog signal, a low-impedance buffer should be
inserted.

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