Branch instructions table 2.23 branch instructions – Renesas SH7641 User Manual
Page 127
Section 2 CPU
Rev. 4.00 Sep. 14, 2005 Page 77 of 982
REJ09B0023-0400
Branch Instructions
Table 2.23 Branch Instructions
Instruction
Instruction Code
Operation
Execution
States
T Bit
BF label 10001011dddddddd
If T
= 0, disp × 2 + PC → PC;
if T
= 1, nop (where label is
disp + PC)
3/1* —
BF/S label
10001111dddddddd
Delayed branch, if T
= 0,
disp
× 2 + PC → PC;
if T
= 1, nop
2/1* —
BT label 10001001dddddddd
Delayed branch, if T
= 1,
disp
× 2 + PC → PC;
if T
= 0, nop
3/1* —
BT/S label
10001101dddddddd
If T
= 1, disp × 2 + PC → PC;
if T
= 0, nop
2/1* —
BRA label
1010dddddddddddd
Delayed branch,
disp
× 2 + PC → PC
2 —
BRAF Rm
0000mmmm00100011
Delayed branch,
Rm + PC
→ PC
2 —
BSR label
1011dddddddddddd
Delayed branch, PC
→ PR,
disp
× 2 + PC → PC
2 —
BSRF Rm
0000mmmm00000011
Delayed branch, PC
→ PR,
Rm + PC
→ PC
2 —
JMP @Rm
0100mmmm00101011
Delayed branch, Rm
→ PC
2
—
JSR @Rm
0100mmmm00001011
Delayed branch, PC
→ PR,
Rm
→ PC
2 —
RTS
0000000000001011
Delayed branch, PR
→ PC
2
—
Note: * One state when the branch is not executed.