Renesas SH7641 - Manual (Page 70)

Section 1 Overview
Rev. 4.00 Sep. 14, 2005 Page 20 of 828
REJ09B0023-0400
Classification Symbol I/O Name Function
Bus control RD/
WR O
Read/write Read/write signal
BS
O Bus start Bus-cycle start
WE3/DQMUU/
AH
O Byte specification Indicates that bits 31 to 24 of the
data in the external memory or
device are being written.
Selects D31 to D24 when SDRAM is
connected.
Address hold signal for address/data
multiplexed I/O.
WE2/DQMUL
O Byte specification Indicates that bits 23 to 16 of the
data in the external memory or
device are being written.
Selects D23 to D16 when SDRAM is
connected.
WE1/DQMLU O Byte
specification Indicates that bits 15 to 8 of the data
in the external memory or device are
being written.
Selects D15 to D8 when SDRAM is
connected.
WE0/DQMLL O Byte
specification Indicates that bits 7 to 0 of the data
in the external memory or device are
being written.
Selects D7 to D0 when SDRAM is
connected.
RASU, RASL
O RAS Connected to the
RAS pin when the
SDRAM is connected.
CASU, CASL
O CAS Connected to the
CAS pin when the
SDRAM is connected.
CKE O CK enable Connected to the CKE pin when the
SDRAM is connected.
FRAME
O FRAME signal Connects the
FRAME signal for the
burst MPX-IO interface.
WAIT
I Wait When active, inserts a wait cycle into
the bus cycles during access to the
external space.