Renesas SH7641 - Manual (Page 275)

Section 10 Interrupt Controller (INTC)
Rev. 4.00 Sep. 14, 2005 Page 225 of 982
REJ09B0023-0400
10.3.2 Interrupt Control Register 0 (ICR0)
ICR0 is a register that sets the input signal detection mode of external interrupt input pin
NMI, and
indicates the input signal level at the
NMI pin. This register is initialized to H'0000 or H'8000 by a
power-on reset or manual reset, but is not initialized in standby mode.
Bit Bit Name
Initial
Value R/W
Description
15 NMIL 0/1* R NMI Input Level
Sets the level of the signal input at the NMI pin. This bit
can be read from to determine the NMI pin level. This
bit cannot be modified.
0: NMI input level is low
1: NMI input level is high
14 to 9
 All
0 R Reserved
These bits are always read as 0. The write value should
always be 0.
8 NMIE 0 R/W NMI Edge Select
Selects whether the falling or rising edge of the
interrupt request signal on the
NMI pin is detected.
0: Interrupt request is detected on falling edge of
NMI
input
1: Interrupt request is detected on rising edge of
NMI
input
7 to 0  All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
Note: * 1 when
NMI input is high, 0 when NMI input is low.