Renesas SH7641 - Manual (Page 610)

Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 560 of 982
REJ09B0023-0400
Bit Bit Name
Initial
value R/W
Description
3 FB 0 R/W External Feedback Signal Enable
This bit selects whether the switching of the output of
the positive/reverse phase is carried out automatically
with the MTU/channel 0 TGRA, TGRB, TGRC input
capture signals or by writing 0 or 1 to bits 2 to 0 in
TGCR.
0: Output switching is carried out by external input
(Input sources are channel 0 TGRA, TGRB, TGRC
input capture signal)
1: Output switching is carried out by software (TGCR's
UF, VF, WF settings).
2
1
0
WF
VF
UF
0
0
0
R/W
R/W
R/W
Output Phase Switch 2 to 0
These bits set the positive phase/negative phase
output phase on or off state. The setting of these bits
is valid only when the FB bit in this register is set to 1.
In this case, the setting of bits 2 to 0 is a substitute for
external input. See table 18.28.
Table 18.28 Output level Select Function
Function
Bit 2 Bit 1 Bit 0 TIOC3B TIOC4A TIOC4B TIOC3D TIOC4C TIOC4D
WF VF UF U Phase V Phase W Phase U Phase V Phase W Phase
0 0 0 OFF OFF OFF OFF OFF OFF
1 ON OFF OFF OFF OFF ON
1 0 OFF ON OFF ON OFF OFF
1 OFF ON OFF OFF OFF ON
1 0 0 OFF OFF ON OFF ON OFF
1 ON OFF OFF OFF ON OFF
1 0 OFF OFF ON ON OFF OFF
1 OFF OFF OFF OFF OFF OFF