Renesas SH7641 - Manual (Page 111)

Section 2 CPU
Rev. 4.00 Sep. 14, 2005 Page 61 of 982
REJ09B0023-0400
2.4.4 DSP Instruction Formats
This LSI includes new instructions for digital signal processing. The new instructions are of the
following two kinds.
1. Memory and DSP register double and single data transfer instructions (16-bit length)
2. Parallel processing instructions processed by the DSP unit (32-bit length)
The instruction formats are shown in figure 2.15.
15 16 25 26 31 0
0
0
0
15
15
15
9
9 10
10
A field
A field
A field B field 1 1 1 1 1 0
1 1 1 1 0 1
1 1 1 1 0 0
0 0 0 0
1 1 1 0
CPU core instructions
Double data transfer
instructions
Single data transfer
instructions
Parallel processing
instructions
..
.
Figure 2.15 DSP Instruction Formats