Motorola ColdFire MCF5281 - Manual (Page 87)

Enhanced Multiply-Accumulate Unit (EMAC)
Freescale Semiconductor 3-9
Figure 3-7 and Figure 3-8 show relative alignment of input operands, the full 64-bit product, the resulting
40-bit product used for accumulation, and 48-bit accumulator formats.
Figure 3-7. Fractional Alignment
Figure 3-8. Signed and Unsigned Integer Alignment
Therefore, the 48-bit accumulator definition is a function of the EMAC operating mode. Given that each
48-bit accumulator is the concatenation of 16-bit accumulator extension register (ACCextn) contents and
32-bit ACCn contents, the specific definitions are:
if MACSR[6:5] == 00 /* signed integer mode */
Complete Accumulator[47:0] = {ACCextn[15:0], ACCn[31:0]}
if MACSR[6:5] == 01 or 11 /* signed fractional mode */
Complete Accumulator [47:0] = {ACCextn[15:8], ACCn[31:0], ACCextn[7:0]}
if MACSR[6:5] == 10 /* unsigned integer mode */
Complete Accumulator[47:0] = {ACCextn[15:0], ACCn[31:0]}
The four accumulators are represented as an array, ACCn, where n selects the register.
X
OperandY
OperandX
Product
Extended Product
Accumulator
8
Extension Byte Upper [7:0]
+
0
32
40
40
8 40
Extension Byte Lower [7:0]
32
23
8
Accumulator [31:0]
X
OperandY
OperandX
Product
Extended Product
Accumulator
32
32
32
32
32
8
8
8
24
8
8
+
Extension Byte Upper [7:0]
Extension Byte Lower [7:0]
Accumulator [31:0]
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3