Motorola ColdFire MCF5281 - Manual (Page 75)

ColdFire Core
Freescale Semiconductor 2-29
ASL.L ,Dx 1(0/0) — — — — — — 1(0/0)
ASR.L ,Dx 1(0/0) — — — — — — 1(0/0)
BCHG Dy, 2(0/0) 4(1/1) 4(1/1) 4(1/1) 4(1/1) 5(1/1) 4(1/1) —
BCHG #imm, 2(0/0) 4(1/1) 4(1/1) 4(1/1) 4(1/1) — — —
BCLR Dy, 2(0/0) 4(1/1) 4(1/1) 4(1/1) 4(1/1) 5(1/1) 4(1/1) —
BCLR #imm, 2(0/0) 4(1/1) 4(1/1) 4(1/1) 4(1/1) — — —
BSET Dy, 2(0/0) 4(1/1) 4(1/1) 4(1/1) 4(1/1) 5(1/1) 4(1/1) —
BSET #imm, 2(0/0) 4(1/1) 4(1/1) 4(1/1) 4(1/1) — — —
BTST Dy, 2(0/0) 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) —
BTST #imm, 1(0/0) 3(1/0) 3(1/0) 3(1/0) 3(1/0) — — —
CMP.L ,Rx 1(0/0) 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) 1(0/0)
CMPI.L #imm,Dx 1(0/0) — — — — — — —
DIVS.W ,Dx 20(0/0) 23(1/0) 23(1/0) 23(1/0) 23(1/0) 24(1/0) 23(1/0) 20(0/0)
DIVU.W ,Dx 20(0/0) 23(1/0) 23(1/0) 23(1/0) 23(1/0) 24(1/0) 23(1/0) 20(0/0)
DIVS.L ,Dx
≤
35(0/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0) — — —
DIVU.L ,Dx
≤
35(0/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0) — — —
EOR.L Dy, 1(0/0) 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1) —
EORI.L #imm,Dx 1(0/0) — — — — — — —
LEA ,Ax — 1(0/0) — — 1(0/0) 2(0/0) 1(0/0) —
LSL.L ,Dx 1(0/0) — — — — — — 1(0/0)
LSR.L ,Dx 1(0/0) — — — — — — 1(0/0)
MOVEQ.L #imm,Dx — — — — — — — 1(0/0)
OR.L ,Rx 1(0/0) 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) 1(0/0)
OR.L Dy, — 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1) —
ORI.L #imm,Dx 1(0/0) — — — — — — —
REMS.L ,Dx
≤
35(0/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0) — — —
REMU.L ,Dx
≤
35(0/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0)
≤
38(1/0) — — —
SUB.L ,Rx 1(0/0) 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) 1(0/0)
SUB.L Dy, — 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1) —
SUBI.L #imm,Dx 1(0/0) — — — — — — —
SUBQ.L #imm, 1(0/0) 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1) —
SUBX.L Dy,Dx 1(0/0) — — — — — — —
Table 2-15. Two Operand Instruction Execution Times (continued)
Opcode
Effective Address
Rn (An) (An)+ -(An)
(d16,An)
(d16,PC) (d8,An,Xn*SF)
(d8,PC,Xn*SF)
xxx.wl #xxx
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3