Motorola ColdFire MCF5281 - Manual (Page 359)

Watchdog Timer Module
Freescale Semiconductor 18-5
18.5.2.3 Watchdog Count Register (WCNTR)
18.5.2.4 Watchdog Service Register (WSR)
When the watchdog timer is enabled, writing 0x5555 and then 0xAAAA to WSR before the watchdog
counter times out prevents a reset. If WSR is not serviced before the timeout, the watchdog timer sends a
signal to the reset controller module that sets the RSR[WDR] bit and asserts a system reset.
Both writes must occur in the order listed before the timeout, but any number of instructions can be
executed between the two writes. However, writing any value other than 0x5555 or 0xAAAA to WSR
resets the servicing sequence, requiring both values to be written to keep the watchdog timer from causing
a reset.
Table 18-4. WMR Field Descriptions
Bit(s) Name Description
15–0 WM Watchdog modulus. Contains the modulus that is reloaded into the watchdog counter
by a service sequence. Once written, the WM[15:0] field is not affected by further
writes except in halted mode. Writing to WMR immediately loads the new modulus
value into the watchdog counter. The new value is also used at the next and all
subsequent reloads. Reading WMR returns the value in the modulus register.
Reset initializes the WM[15:0] field to 0xFFFF.
Note: The prescaler counter is reset anytime a new value is loaded into the watchdog
counter and also during reset.
15 14 13 12 11 10 9 8
Field WC15 WC14 WC13 WC12 WC11 WC10 WC9 WC8
Reset 1111_1111
R/W R
7 6 5 4 3 2 1 0
Field WC7 WC6 WC5 WC4 WC3 WC2 WC1 WC0
Reset 1111_1111
R/W R
Address IPSBAR + x0014_0004, 0x0014_0005
Figure 18-4. Watchdog Count Register (WCNTR)
Table 18-5. WCNTR Field Descriptions
Bit(s) Name Description
15–0 WC Watchdog count field. Reflects the current value in the watchdog counter. Reading the
16-bit WCNTR with two 8-bit reads is not guaranteed to return a coherent value.
Writing to WCNTR has no effect, and write cycles are terminated normally.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3