Motorola ColdFire MCF5281 - Manual (Page 661)

Debug Support
Freescale Semiconductor 30-43
For all types of exception processing, the PST = 0xC value is driven at all times, unless the PST output is
needed for one of the optional marker values or for the taken branch indicator (0x5).
Table 30-23 shows the PST/DDATA specification for multiply-accumulate instructions.
30.7.2 Supervisor Instruction Set
The supervisor instruction set has complete access to the user mode instructions plus the opcodes shown
below. The PST/DDATA specification for these opcodes is shown in
Table 30-24 .
Table 30-23. PST/DDATA Specification for MAC Instructions
Instruction Operand Syntax PST/DDATA
mac.l Ry,Rx,Accx PST = 0x1
mac.l RyRx,,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
mac.w Ry,Rx,Accx PST = 0x1
mac.w Ry,Rx,,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
move.l y,Accx PST = 0x1
move.l Accy,Accx PST = 0x1
move.l y,MACR PST = 0x1
move.l y,MASK PST = 0x1
move.l y,Accext01 PST = 0x1
move.l y,Accext23 PST = 0x1
move.l Accy,Rx PST = 0x1
move.l MACSR,CCR PST = 0x1
move.l MACSR,Rx PST = 0x1
move.l MASK,Rx PST = 0x1
move.l Accext01,Rx PST = 0x1
move.l Accext23,Rx PST = 0x1
msac.l Ry,Rx,Accx PST = 0x1
msac.l Ry,Rx,,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
msac.w Ry,Rx,Accx PST = 0x1
msac.w Ry,Rx,,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Table 30-24. PST/DDATA Specification for Supervisor-Mode Instructions
Instruction Operand Syntax PST/DDATA
cpushl PST = 0x1
halt PST = 0x1,
PST = 0xF
move.w SR,Dx PST = 0x1
move.w {Dy,#imm},SR PST = 0x1, {PST = 0x3}
movec Ry,Rc PST = 0x1
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3