Motorola ColdFire MCF5281 - Manual (Page 749)

Freescale Semiconductor Index-1
Appendix C
Index
A
A/D converter
bias 28-34
block diagram 28-32
channel decode 28-33
comparator 28-33
cycle times 28-32
multiplexer 28-33
operation 28-31
sample buffer 28-33
state machine 28-34
successive approximation register (SAR) 28-34
Acknowledge error (ACKERR) 25-26
Address variant 30-4
Analog inputs 28-66
Analog power signals 28-56
Analog reference signals 28-56
Analog supply
filtering 28-61
grounding 28-61
Async inputs signal timing 33-23
B
BDM
see debug
commands
DUMP 30-27
FILL 30-29
format 30-20
GO 30-31
NOP 30-31
RAREG/RDREG 30-23
RCREG 30-31
RDMREG 30-35
READ 30-24
sequence diagrams 30-21
summary 30-19
WAREG/WDREG 30-23
WCREG 30-34
WDMREG 30-36
WRITE 30-26
CPU halt 30-16
operation with processor 30-38
packet format
receive 30-18
transmit 30-19
recommended pinout 30-45
register accesses
EMAC 30-33
stack pointer 30-33
serial interface 30-18
timing diagrams
BDM serial port AC timing 33-28
real-time trace AC timing 33-28
Bit error (BITERR) 25-26
Bit stuff error (STUFFERR) 25-26
branch instruction execution times
BRA, Bcc instruction execution times (table 3-16) 2-32
table 3-15 2-32
Bus
access by matches in CSCR and DACR 13-4
characteristics 13-2
data transfer
back-to-back cycles 13-9
burst cycles 13-10
allowable line access patterns 13-10
line read bus cycles 13-10
line transfers 13-10
line write bus cycles 13-12
cycle execution 13-3
cycle states 13-4
fast termination cycle 13-8
read cycle 13-6
write cycle 13-7
electrical characteristics
input timing specifications 33-11
output timing specifications 33-12
features 13-1
internal
arbitration 8-7
algorithms 8-9
fixed mode 8-9
overview 8-8
round-robin mode 8-9
MPARK 8-9
operands, misaligned 13-14
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3