Motorola ColdFire MCF5281 - Manual (Page 469)

I 2 C Interface
Freescale Semiconductor 24-15
Figure 24-14. Flow-Chart of Typical I
2
C Interrupt Routine
Clear
Master
Mode?
TX/Rx
?
Last Byte
Transmitted
?
RXAK= 0
?
End of
ADDR Cycle
(Master RX)
?
Write Next
Byte to I2DR
Switch to
Rx Mode
Dummy Read
from I2DR
Generate
STOP Signal
Read Data
from I2DR
And Store
Set TXAK =1
Generate
STOP Signal
2nd Last
Byte to be
Last
Byte to be
?
Arbitration
Lost?
Clear IAL
IAAS=1
?
IAAS=1
?
SRW=1
?
Tx/Rx
?
Set TX
Mode
Write Data
to I2DR
Set RX
Mode
Dummy Read
from I2DR
ACK from
Receiver
?
Tx Next
Byte
Read Data
from I2DR
and Store
Switch to
Rx Mode
Dummy Read
from I2DR
RTE
Y N
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
N
N N
N
N
N
N
Y
TX RX
RX
TX (WRITE)
(Read)
N
IIF
Address
Cycle
Data
Cycle
Read
Read?
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3