B.3 changes between rev. 1 and rev. 2 – Motorola ColdFire MCF5281 User Manual
Page 741
Revision History
Freescale Semiconductor
B-5
B.3
Changes Between Rev. 1 and Rev. 2
Added timing diagrams and tables to
Section 33.13, “Fast Ethernet AC Timing Specifications
.”
Changed the max value in spec 1 to “1/4.”
Changed the min value in spec 2 to “4.”
Changed the min value in spec 3 to “25.”
Changed the min value in spec 6 to “25.”
Changed the max value in spec 7 to “30.”
Changed the max value in spec 8 to “30.”
Changed the max value in spec 11 to “25.”
Changed the min value in spec D1 to “5.”
Changed the min value in spec D2 to “2.”
Changed offset for the copy of RAMBAR to “0x008.”
Table B-3. Rev. 1 to Rev. 2 Changes
Location
Description
Throughout Manual Added MCF5281 device to manual. The MCF5281 implements half the Flash of the MCF5282.
1.1/1-1
Changed the description of real time debug support. It has only one user-visible hardware breakpoint
register.
Table 2-2/2-7
Change the I field description to read: “Interrupt level mask. Defines the current interrupt level. Interrupt
requests are inhibited for all priority levels less than or equal to the current level, except the edge-sensitive
level 7 request, which cannot be masked.”
Table 5-1/5-2
Replaced the description of PRI1 and PRI2.
Table 5-1/5-3
Added note to the SPV bit description, “The BDE bit in the second RAMBAR register must also be set to
allow dual port access to the SRAM. For more information, see Section 8.4.2, ‘Memory Base Address
Register (RAMBAR).’”
Figure 6-2/6-4
Replaced Figure 6-2, “CFM 512K Array Memory Map” and renamed it “CFM Array Memory Map”
Table 6-12/6-16
Change value for page erase verify command to 0x06.
Table 6-13/6-20
Change value for page erase verify command to 0x06.
Table B-2. Rev. 0.1 to Rev. 1 Changes (continued)
Location
Description
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3