Motorola ColdFire MCF5281 - Manual (Page 569)

Queued Analog-to-Digital Converter (QADC)
Freescale Semiconductor 28-31
Figure 28-18 shows that the two MA signals may also be analog input signals. When external multiplexing
is selected, none of the MA signals can be used for analog or digital inputs. They become multiplexed
address outputs and are unaffected by DDRQA[1:0].
28.7.2.2 Module Version Options
The number of available analog channels varies, depending on whether external multiplexing is used. A
maximum of eight analog channels are supported by the internal multiplexing circuitry of the converter.
Table 28-21 shows the total number of analog input channels supported with 0 to 4 external multiplexer
chips.
28.7.3 Analog Subsystem
This section describes the QADC analog subsystem, which includes the front-end analog multiplexer and
analog-to-digital converter.
28.7.3.1 Analog-to-Digital Converter Operation
The analog subsystem consists of the path from the input signals to the A/D converter block. Signals from
the queue control logic are fed to the multiplexer and state machine. The end-of-conversion (EOC) signal
and the successive approximation register (SAR) reflect the result of the conversion.
Figure 28-19 shows
a block diagram of the QADC analog subsystem.
Table 28-21. Analog Input Channels
Number of Analog Input Channels Available
Directly Connected + External Multiplexed = Total Channels
1, 2
1
The external trigger inputs are not shared with two analog input signals.
2 When external multiplexing is used, two input channels are configured as multiplexed address
outputs, and for each external multiplexer chip, one input channel is a multiplexed analog input.
No External Mux
One External
Mux
Two External
Muxes
Three External
Muxes
Four External
Muxes
8 5 + 4 = 9 4 + 8 = 12 3 + 12 = 15 2 + 16 = 18
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3