3 edge port interrupt enable register (epier), 4 edge port data register (epdr) – Motorola ColdFire MCF5281 User Manual
Page 213

Edge Port Module (EPORT)
Freescale Semiconductor
11-5
11.4.2.3
Edge Port Interrupt Enable Register (EPIER)
11.4.2.4
Edge Port Data Register (EPDR)
7
6
5
4
3
2
1
0
Field
EPIE7
EPIE6
EPIE5
EPIE4
EPIE3
EPIE2
EPIE1
—
Reset
0000_0000
R/W
R/W
R
Address
IPSBAR + 0x0013_0003
Figure 11-4. EPORT Port Interrupt Enable Register (EPIER)
Table 11-5. EPIER Field Descriptions
Bit(s)
Name
Description
7–1
EPIEx
Edge port interrupt enable bits enable EPORT interrupt requests. If a bit in EPIER is
set, EPORT generates an interrupt request when:
• The corresponding bit in the EPORT flag register (EPFR) is set or later becomes
set.
• The corresponding pin level is low and the pin is configured for level-sensitive
operation.
Clearing a bit in EPIER negates any interrupt request from the corresponding EPORT
pin. Reset clears EPIE7-EPIE1.
1 Interrupt requests from corresponding EPORT pin enabled
0 Interrupt requests from corresponding EPORT pin disabled
0
—
Reserved, should be cleared.
7
6
5
4
3
2
1
0
Field
EPD7
EPD6
EPD5
EPD4
EPD3
EPD2
EPD1
—
Reset
1111_1111
R/W
R/W
R
Address
IPSBAR + 0x0013_0004
Figure 11-5. EPORT Port Data Register (EPDR)
Table 11-6. EPDR Field Descriptions
Bit(s)
Name
Description
7–1
EPDx
Edge port data bits. Data written to EPDR is stored in an internal register; if any pin of
the port is configured as an output, the bit stored for that pin is driven onto the pin.
Reading EDPR returns the data stored in the register. Reset sets EPD7-EPD1.
0
—
Reserved, should be cleared.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3