Motorola ColdFire MCF5281 - Manual (Page 714)

Register Memory Map
A-2 Freescale Semiconductor
Table A-2. Module Memory Map Overview
Address Module Size
IPSBAR + 0x00_0000 System Control Module 64 bytes
IPSBAR + 0x00_0040 SDRAM Controller 64 bytes
IPSBAR + 0x00_0080 Chip Selects 128 bytes
IPSBAR + 0x00_0100 DMA (Channel 0) 64 bytes
IPSBAR + 0x00_0140 DMA (Channel 1) 64 bytes
IPSBAR + 0x00_0180 DMA (Channel 2) 64 bytes
IPSBAR + 0x00_01C0 DMA (Channel 3) 64 bytes
IPSBAR + 0x00_0200 UART0 64 bytes
IPSBAR + 0x00_0240 UART1 64 bytes
IPSBAR + 0x00_0280 UART2 64 bytes
IPSBAR + 0x00_0300 I
2
C 64 bytes
IPSBAR + 0x00_0340 QSPI 64 bytes
IPSBAR + 0x00_0400 DMA Timer 0 64 bytes
IPSBAR + 0x00_0440 DMA Timer 1 64 bytes
IPSBAR + 0x00_0480 DMA Timer 2 64 bytes
IPSBAR + 0x00_04C0 DMA Timer 3 64 bytes
IPSBAR + 0x00_0C00 Interrupt Controller 0 256 bytes
IPSBAR + 0x00_0D00 Interrupt Controller 1 256 bytes
IPSBAR + 0x00_0F00 Global Interrupt Acknowledge Cycles 256 bytes
IPSBAR + 0x00_1000 Fast Ethernet Controller (Registers and MIB RAM)
(Reserved for MCF5214 and MCF5216)
1 K
IPSBAR + 0x00_1400 Fast Ethernet Controller (FIFO Memory)
(Reserved for MCF5214 and MCF5216)
1K
IPSBAR + 0x10_0000 Ports 64K
IPSBAR + 0x11_0000 Reset Controller, Chip Configuration, and Power Management 64K
IPSBAR + 0x12_0000 Clock Module 64K
IPSBAR + 0x13_0000 Edge Port 64K
IPSBAR + 0x14_0000 Watchdog Timer 64K
IPSBAR + 0x15_0000 Programmable Interval Timer 0 64K
IPSBAR + 0x16_0000 Programmable Interval Timer 1 64K
IPSBAR + 0x17_0000 Programmable Interval Timer 2 64K
IPSBAR + 0x18_0000 Programmable Interval Timer 3 64K
IPSBAR + 0x19_0000 QADC 64K
IPSBAR + 0x1A_0000 General Purpose Timer A 64K
IPSBAR + 0x1B_0000 General Purpose Timer B 64K
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3