Table 8-224, Scratchpad register, Table 8-225 – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual
Page 428: Test mode control register, Cpld and fpga, 3 test mode control register
CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E)
428
Registermemory without any control or status function.
8.4.2.11.3 Test Mode Control Register
Address: 0xE8, TestModeCtrlReg
Width: 8 bit
Register to control testmodes.
Table 8-224 ScratchPad Register
Bit
Acronym
Type
Description
Default
Pwr
Soft
7...0
ScratchPadData
RW
Scratch Pad Data
0x0
X
X
Table 8-225 Test Mode Control Register
Bit
Acronym
Type
Description
Default
Pwr
Soft
7
ChgnProtSchm
RW
0b1: ChgnProtSchm, must
always be set to 0
0b0
X
X
6
SkipProtInitSeq
RW
0b1: SkipProtInitSeq, must
always be set to 0
0b0
X
X
5
RstCfgIf
RW
0b1: RstCfgIf, must always be
set to 0
0b0
X
X
4...3
-
-
reserved
undef
-
-
2
DspLittleEndian
RW
0b1: DspLittleEndianEnable,
Enable little endian mode,
common control for all DSPs
0b0: DspLittleEndiapDisable,
Disable little endian mode,
common control for all DSPs
0b1
X
X