Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 344)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 344
 ARTM Interrupt Registers
8.2.2.3.36 KCS Interface registers
Any access to the KCS registers is forwarded by the Local bus to SPP LPC Host bridge.
Table 8-153 ARTM Interrupt Status Register
Address: 0xAC - 0xAD
Bit Interrupt Signal Description Default Access
0 ARTM_INT ARTM Interrupt via ARTM SPI signal
RTM_SPI_MISO. Ext. SPP: r
15:1 - Reserved 0 r
Table 8-154 ARTM Interrupt Enable Register
Address: 0xAE - 0xAF
Bit Interrupt Signal Description Default Access
0 ARTM_INT ARTM Interrupt enable:
0: Disabled
1:Enabled 0 SPP: r/w
15:1 - Reserved 0 r
Table 8-155 KCS Data Register
Address: 0xB0 - 0xB1
Bit Description Default Access
7:0 KCS Data Register
Forwarded via SPP LPC to IPMC using LPC IO address 0xCA2 PWR_GOOD:0 SPP: r/w
15:8 Reserved 0 r