16 reset domain control, Figure 8-11, Spp com1 serial redirection – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual
Page 368: Cpld and fpga, 3 spp com1 serial routing

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E)
368
8.2.3.15.3 SPP COM1 Serial Routing
The IPMC controls the serial redirection of the SPP serial interface COM1 with the signal
COM_ROUTE_C.
8.2.3.16 Reset Domain Control
The SPP is responsible for all rest domains
Reset signal for each reset domain can be controlled (assert/negate)
Reset domains are TBD. Minimum:
–
GPP CPU block
–
Broadcom switch + SRIO
–
ARTM
–
SPP and everything else (when HRESET_REQ is driven)
Reset configuration register keeps unchanged, when HRESET is asserted.
Figure 8-11 SPP COM1 Serial Redirection
Glue Logic FPGA
SPP
COM1
SPP Front
COM
Terminal
Server 2
SPP_FP_COM_TXD
SPP_FP_COM_RXD
TS_COM2_RXD
TS_COM2_TXD
COM_ROUTE_C = 0:
COM_ROUTE_C = 1:
COM_ROUTE_C
SPP_COM1_TXD
SPP_COM1_RXD