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Cpld and fpga – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual

Page 371

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CPLD and FPGA

ATCA-8310 Installation and Use (6806800M72E)

371

Unit Description

The main task of the DSP FPGA is to connect the speech payload of one DSP-Pool on a DSP-
submodule or on the baseboard to the RTM-FPGA via one 2.5 Gbit/s SERDES link.

Besides this the DSP FPGA supplies all DSP devices on the module with clocks and supports the
host controller on the base board related to power control and monitoring, reset control,
interrupt control and boot monitoring. The DSP FPGA has a SPI control and status interface to
the host controller.

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