Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 361)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 361
8.2.3.11.2 Shared Memory for GPP and SPP
The Glue Logic FPGA has 2kB Shared Memory. The Memory is reachable from SPP and GPP via
page area register accesses. See
Chapter 8, Page Pointer 1 to Shared Memory, on page 316 and
Chapter 8, Page Pointer 2 to Shared Memory, on page 316 for details how to access the shared
memory.
Software is responsible for data consistency.
The Shared Memory is used for Inter Processor Communication of GPP and GPP (IPC).
8.2.3.11.3 Mailbox Registers
The Mailbox Registers are used for Inter Processor Communication of GPP and GPP (IPC).
 From SPP to GPP
Write access from SPP triggers an interrupt on the GPP side. GPP can read written value.
 From GPP to SPP
Write access from GPP triggers an interrupt on the SPP side. SPP can read written value.
8.2.3.11.4 Semaphore Registers
There are four Semaphore registers. The behavior is:
 Initial content is "not taken".
 Read access atomically
– Provides current value ("not taken" or "taken")
– Sets register to "taken"
 Write access reset register to "not taken"
 Triggers IRQ on "other" side (when enabled)
8.2.3.11.5 Port 80 Support
The GPP Port 80 outputs may be read by SPP and IPMC.