Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 234)

Intelligent Peripheral Management Controller
ATCA-8310 Installation and Use (6806800M72E) 234
In case of the FPGA watchdog expires, the IPMC receives an interrupt to reset the payload. In
case of Fail Safe is enabled, the IPMC will also switch the boot banks on SPP.
The FPGA is not reset. It receives the reset payload signal request and decides upon its reset
mask register (configurable by customer) which reset domains to reset:
 GPP
 Broadcom Switch
 DMC Base
 DMC #1
 DMC #2
 ARTM-8310
 Telecom clock
 SRIO
7.15 Payload Interface
The IPMC communicates with the payload via its host KCS interface. The Renesas H8S provides
support for LPC/KCS in hardware. KCS, which is short for Keyboard Style Controller, is defined
by the IPMI 1.5 Specification.
7.16 Payload Boot Bank Selection
The ATCA-8310 provides redundant payload boot flashes for crisis recovery. The IPMC
manages from which boot bank the payload will boot from.