Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 404)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 404
8.4.2.6.2 DSP Local Reset and NMI Control Register
Address: 0x9C, DspResNmiCtrlReg
Width: 16 bit
This register is used to control the local reset and NMI pins to 10 TI Tomahawk DSPs
(TMS320TCI6486).
4 DspReset4 RW 0b1: DspReset4, activates the Warm
Reset pin (DSP4_RST_N) for DSP4 0b0 X X
3 DspReset3 RW 0b1: DspReset3, activates the Warm
Reset pin (DSP3_RST_N) for DSP3 0b0 X X
2 DspReset2 RW 0b1: DspReset2, activates the Warm
Reset pin (DSP2_RST_N) for DSP2 0b0 X X
1 DspReset1 RW 0b1: DspReset1, activates the Warm
Reset pin (DSP1_RST_N) for DSP1 0b0 X X
0 DspReset0 RW 0b1: DspReset0, activates the Warm
Reset pin (DSP0_RST_N) for DSP0 0b0 X X
Table 8-198 DSP and Phy Reset and Dsp NMI Control Register (continued)
Bit Acronym Type Description Default Pwr Soft
Table 8-199 DSP Local Reset and NMI Control Register
Bit Acronym Type Description Default Pwr Soft
15 Nmi RW 0b1: Nmi, activates the NMI pin (NMI_N)
of the DSP which is selected by the DspSel
bitfield 0b0 X X
14 LReset RW 0b1: LReset, activates the Local Reset pin
(LRESET_N) of the DSP which is selected by
the DspSel bitfield 0b0 X X
13...7 - - reserved undef - -