Table 8-131, Failover status registers, Table 8-132 – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual
Page 328: Failover control registers, Cpld and fpga, 34 failover status/control registers
CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E)
328
The following registers are only accessible by the SPP. For GPP and IPMC these registers are out
of address range.
8.2.2.3.34 Failover Status/Control Registers
Table 8-131 Failover Status Registers
Address Offset: 0x80
Bit Description
Default
Access
2:0
Status Failover Role:
0: Active. Local Blade is active and Remote Blade is healthy.
1: Standby. Remote Blade is active and healthy.
2: Standalone. Local Blade is active and no Remote Blade (or
Remote Blade is not healthy).
3: Error. Remote Blade is active, but Remote Blade is not healthy.
0
SPP: r
3
Local Healthy:
1: Healthy
0: Not Healthy
0
SPP: r
4
Remote Healthy:
1: Healthy
0: Not Healthy
SPP: r
7:5
Reserved
0
r
Table 8-132 Failover Control Registers
Address Offset: 0x81
Bit Description
Default
Access
0
Request Control to get Active:
0: No Request
1: Request active Role. Note: Bt is reset after ~280ns
0
SPP: r/wp
1
Remote Healthy enable:
0: Ignore Remote Healthy input HEALTHY_IN
1: Remote Healthy input HEALTHY_IN force take over.
PWR_G
OOD:0
SPP: r/w