Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 416)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 416
8.4.2.9 General Registers (GnrlRegs)
Resets:
Pwr = Power On Reset
Soft = Soft Reset
Collection of general register not dedicated to particular functions
8.4.2.9.1 Soft Reset Register
Address: 0xC0, SoftResReg
Width: 32 bit
4 V1P0Fail R 0b1: V1P0Fail, indicates an interrupt or
loss of V1P0 power supply after the DMC
has powered up 0b0 X -
3 V1P2Fail R 0b1: V1P2Fail, indicates an interrupt or
loss of V1P2 power supply after the DMC
has powered up 0b0 X -
2 V1P8Fail R 0b1: V1P8Fail, indicates an interrupt or
loss of V1P8 power supply after the DMC
has powered up 0b0 X -
1 V2P5Fail R 0b1: V2P5Fail, indicates an interrupt or
loss of V2P5 power supply after the DMC
has powered up 0b0 X -
0 V3P3Fail R 0b1: V3P3Fail, indicates an interrupt or
loss of V3P3 power supply after the DMC
has powered up 0b0 X -
Table 8-208 DMC Power Supply Monitor Register (continued)
Bit Acronym Type Description Default Pwr Soft