Table 8-125, Spp persistent memory enable register, Table 8-126 – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual
Page 326: Spp persistent memory status register, Table 8-127, Spp scratch register, Cpld and fpga
CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E)
326
8.2.2.3.29 SPP Persistent Memory Registers
8.2.2.3.30 SPP Scratch Register
Table 8-125 SPP Persistent Memory Enable Register
Address: 0x74
Bit
Description
Default
Access
7:0
Persistent memory enable/disable
0xA5:enabled
all others: disabled
PWR_GOOD:0
SPP: r/w
GPP: r
IPMC: r
Table 8-126 SPP Persistent Memory Status Register
Address: 0x75
Bit
Description
Default
Access
0
Persistent memory reset occurred.
1: SPP_IRQ_OUT_ was asserted (low)
PWR_GOOD:0
SPP: r/w1c
GPP: r
IPMC: r
7:1
Reserved
0
r
Table 8-127 SPP Scratch Register
Address: 0x7C
Bit Description
Default
Access
7:0
SPP Scratch Register.
PWR_GOOD:0
SPP: r/w
GPP: r
IPMC: r
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