Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 356)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 356
All interrupts are high active. SW may use each interrupt source high level sensitive or rising
edge sensitive.
 BIOS Interrupt Mapping
The internal Interrupts UART0_INT and UART1_INT of the Super IO modules UART 0 and
UART 1 are routed via SERIRQ. See
Chapter 8, Logical Device Configuration Registers, on page
272 .
8.2.3.7 SPP Interrupt Routing
Table 8-171 BIOS Interrupt Mapping
Interrupt Name IRQ Number Description
UART0_INT Programmable UART 0 Interrupt
UART1_INT Programmable UART 1 Interrupt
Table 8-172 SPP Interrupt Routing
SPP Interrupt Output Interrupt Source Name Comment
SPP_IRQ_[0] KCS_IRQ KCS Interrupt from IRQ#6 via SERIRQ protocol on
SPP_SERIRQ.
SPP_IRQ_[1] TELCO_IRQ Interrupt from Telecom clocking device ACS8520
SPP_IRQ_[2] - All other interrupt sources.
SPP_IRQ_[4:3] - Not Used
SPP_IRQ_[5] - Used for persistent Memory