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Table 8-96, Interrupt mask and map registers, Cpld and fpga – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual

Page 314

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CPLD and FPGA

ATCA-8310 Installation and Use (6806800M72E)

314

Each Interrupt Mask and Map Register has the same layout. See

Table 8-96

for more details.

Table 8-96 Interrupt Mask and Map Registers

Address Offset: 0x23 - 0x36

Bit

Description

Default

Access

4:0

IRQ Frame Number of Serialized IRQ protocol. Any valid Frame
number enables interrupt.
0x00: Interrupt is disabled.
0x01: Frame number 1. IRQ0
0x02: Frame number 2. IRQ1
0x03: Frame number 3. IRQ2 (SMI_)
0x04: Frame number 4. IRQ3
0x05: Frame number 5. IRQ4
0x06: Frame number 6. IRQ5
0x07: Frame number 7. IRQ6
0x08: Frame number 8. IRQ7
0x09: Frame number 9. IRQ8
0x0A: Frame number 10. IRQ9
0x0B: Frame number 11. IRQ1
0x0C: Frame number 12. IRQ11
0x0D: Frame number 13. IRQ12
0x0E: Frame number 14. IRQ13
0x0F: Frame number 15. IRQ14
0x10: Frame number 16. IRQ15
0x11: Frame number 17. IOCHK_
0x12: Frame number 18. INTA_
0x13: Frame number 19. INTB_
0x14: Frame number 20. INTC_
0x16 - 0x1F: Frame number 22-31. IRQ Frame Number not valid.
Value is ignored.

0

GPP: r/w

7:5

Reserved

0

r

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