Table 6-4, Gpp run levels, U-boot – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual
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U-Boot
ATCA-8310 Installation and Use (6806800M72E)
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U-Boot will check whether the GPP is in reset at startup. If this is the case, then:
The shared memory area in the FPGA is set up
The GPP is taken out of reset
u-boot waits until the GPP BIOS indicates "Runlevel 0 reached"
The "gpp" command can be used to control the gpp. It accepts the following options:
start
Starts the GPP if it's in reset, waits until a runlevel >
restart
Same as start, but a GPP reset is enforced.
init
initializes the shared memory parameter area.
runlevel
Shows the current GPP runlevel
port80
Shows the last port-80 code written by the GPP BIOS.
show
Shows the current GPP status
set
Adds, removes or changes a parameter in the shared memory area.
6.2.1.4.1 GPP Run Levels
The GPP BIOS reports its boot progress via run level codes stored in mailbox register 0 of the
glue logic FPGA. The following run levels are defined:
Table 6-4 GPP Run Levels
Value
Mnemonic
Description
0
BIOS PEI
XXX
1
BIOS DXE
XXX
2
BIOS WaitSetup
XXX