Artesyn ATCA-8310 Installation and Use (May 2014) - Manual (Page 423)

CPLD and FPGA
ATCA-8310 Installation and Use (6806800M72E) 423
This register shows the version of the DspFpga
8.4.2.9.10 Unoccupied Address Access Monitor Register
Address: 0xCC, UnOccpdAddrMonReg
Width: 8 bit
This register monitors the access to unoccupied address areas.
8.4.2.9.11 Unoccupied Address Access Monitor Reset Register
Address: 0xCD, UnOccpdAddrMonResetReg
Width: 8 bit
This register resets the access to unoccupied address area monitor and unoccupied address
area address registers
Table 8-217 Dsp Fpga Version Register
Bit Acronym Type Description Default Pwr Soft
31...0 DspFpgaVersion R Version of the DspFpga defined
during synthesis const - -
Table 8-218 Unoccupied Address Access Monitor Register
Bit Acronym Type Description Default Pwr Soft
7...1 - - reserved undef - -
0 UnOccpdAccessed R 0b1: UnOccpdAccessed, An
unoccupied address has been
accessed 0b0 F F
Table 8-219 Unoccupied Address Access Monitor Reset Register
Bit Acronym Type Description Default Pwr Soft
7...1 - - reserved undef - -