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U-boot – Artesyn ATCA-8310 Installation and Use (May 2014) User Manual

Page 198

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U-Boot

ATCA-8310 Installation and Use (6806800M72E)

198

dmc<0-2>: / 0x27

Tests a specific DSP on
DSP module 0, 1 and 2.
Each DSP is configured to
network boot mode and
taken out of reset. The
test checks that a
validboot packet is
received by the
broadcom switch.

BOOT

Failed to assert the reset signal to
the DSP

RST_ASSERT

DSP did not respond to reset
assertion

PHY_IO

Error accessing the ethernet PHY

BCM_IO

Failed to read out packet counters
in the broadcom switch.

RST_DEASSERT

Failed to deassert the DSP reset
signal.

BCM_LINK

No ethernet link was detected in
the broadcom switch for the DSP's
port.

NO_BOOT_PKT

No ethernet packet was received in
the PHY between DSP and BCM
switch

BCM_ERR_PKT

An erroneous packet was received
in the BCM switch.

BCM_NO_PKT

No boot packet was received by the
BCM switch.

BCM_NO_MAC

No MAC address entry in the port's
L2 was found.

dmc<0-2> / 0x27

Tests the glue logic FPGAs
on the DSP modules.

BADFRU

IPMI FRU information for an
assembled DSP could not be read.

CPLDERR

The presence of a DSP module was
reported by IPMI but not by the
onboard logic.

FPGA_REG

Failed to access the DSP glue logic
FPGA registers via SPI.

BAD_MODID

The DSP glue logic FPGA reported a
wrong module ID.

Table 6-10 POST Tests and Description (continued)

Test Name / Event Data
Byte 3

Description

errorId

Description

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