Store word right (1/3) – NEC Network Controller uPD98502 User Manual
Page 565
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Preliminary User’s Manual S15543EJ1V0UM
565
SWR
Store Word Right (1/3)
SWR
base
SWR
1 0 1 1 1 0
rt
offset
31
26 25
21 20
16 15
0
6
5
5
16
Format:
SWR rt, offset (base)
Description:
This instruction can be used with the SWL instruction to store the contents of a register into four consecutive bytes
of memory, when the bytes cross a boundary between two words. SWR stores the register into the appropriate
part of the low-order word; SWL stores the register into the appropriate part of the low-order word of memory.
The SWR instruction adds its sign-extended 16-bit
offset to the contents of general register base to form a virtual
address that may specify an arbitrary byte. It alters only the word in memory that contains that byte. From one to
four bytes will be stored, depending on the starting byte specified.
Conceptually, it starts at the least-significant (rightmost) byte of the register and copies it to the specified byte in
memory; then copies bytes from register to memory until it reaches the high-order byte of the word in memory.
No address error exceptions due to alignment are possible.
address 4
address 0
memory
7
6
5
4
3
2
1
0
before
after
$24
register
SWR $24, 1 ($0)
A
B
C
D
address 4
address 0
7
6
5
4
B
C
D
0