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9 u_ep1cr (usb ep1 control register), 10 u_ep2cr (usb ep2 control register) – NEC Network Controller uPD98502 User Manual

Page 321

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CHAPTER 6 USB CONTROLLER

Preliminary User’s Manual S15543EJ1V0UM

321

6.2.9

U_EP1CR (USB EP1 Control Register)

This register is used for setting the operation of EndPoint1.

If the value in the MAXP field is rewritten during transmitting operation, the operation of USB Controller may

become unpredictable. Therefore, the MAXP can be written only when initial setting is being performed.

Bits

Field

R/W

Default

Description

31

EP1EN

R/W

0

EndPoint Enable:

When the V

R

4120A sets this bit to a ‘1’, EndPoint1 is enabled to transmit

data.

30:20

Reserved

R/W

0

Reserved for future use. Writes ‘0’s.

19

TM1

R/W

0

Tx Mode:

Bit for setting the transmit mode.

When this bit is set to a ‘0’, transmitting is performed in SZLP Mode.

When this bit is set to a ‘1’, transmitting is performed in NZLP Mode.

For a detailed explanation of the transmit modes, see Section 6.5.3.

18:10

Reserved

R/W

0

Reserved for future use. Writes ‘0’s.

9:0

MAXP1

R/W

0

MAX Packet size:

The Max Packet Size of EndPoint1. Prior to the start of a USB transaction,

the V

R

4120A must write an appropriate value into this register.

6.2.10

U_EP2CR (USB EP2 Control Register)

This register is used for setting the operation of EndPoint2.

If the value in the MAXP field is rewritten during receiving operation, the operation of USB Controller may become

unpredictable. Therefore, the MAXP can be written only when initial setting is being performed.

Bits

Field

R/W

Default

Description

31

EP2EN

R/W

0

EndPoint Enable:

When the V

R

4120A sets this bit to a ‘1’, EndPoint2 is enabled to receive data.

30:21

Reserved

R/W

0

Reserved for future use. Writes ‘0’s.

20:19

RM2

R/W

00

Rx Mode:

Bit for setting the receive mode.

When these bits are set to ‘00’ or ‘01’, data receiving is performed in Normal

Mode.

When these bits are set to ‘10’, data receiving is performed in Assemble

Mode.

When these bits are set to ‘11’, data receiving is performed in Separate

Mode.

For a detailed explanation of the receive modes, see Section 6.6.4.

18:10

Reserved

R/W

0

Reserved for future use. Writes ‘0’s.

9:0

MAXP2

R/W

0

MAX Packet size:

The Max Packet Size of EndPoint2. Prior to the start of a USB transaction,

the V

R

4120A must set an appropriate value into this register.

Remark

In Normal Mode, indication is issued every received packet so that error status for every packet can be

noticed. In the other modes, error status is noticed for all received packets, not for every packet.