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NEC Network Controller uPD98502 User Manual

Page 233

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CHAPTER 4 ATM CELL PROCESSOR

Preliminary User’s Manual S15543EJ1V0UM

233

4.1.3.1 AAL-5 SAR sublayer function

When ATM Cell Processor transmits a cell in AAL-5 mode, it adds a trailer to the variable-length data, as well as

padding, so that its overall length becomes a multiple of 48 bytes, thereby generating an AAL-5 PDU. When ATM Cell

Processor receives cells, it stores them in the SDRAM in order to assemble a CPCS PDU. ATM Cell Processor

verifies the trailer of the assembled CPCS PDU. If the errors have occurred, the ATM Cell Processor informs the

result to V

R

4120A RISC Processor with Rx indication.

Figure 4-3. AAL-5 Sublayer and ATM Layer

U ser D ata

0 to 64 kbytes

P adding

C P C S -

U U

C P I

Length

C R C -32

trailer

0 to 47

bytes

1 byte

1 byte

2 bytes

4 bytes

segm ent

segm ent

segm ent

48 bytes

48 bytes

48 bytes

(a) Padding field: Field of 0 to 47 bytes that is inserted between the user data and the trailer to adjust the

length of the resulting packet to a multiple of 48 bytes. ATM Cell Processor writes zeros to all its bits.

(b) CPCS-UU field: Used to transfer user information. The value set in the packet descriptor by the host is

written in this field.

(c) CPI field: The use of this field has yet to be finalized. According to the current specifications, all its bits must

be set to zeros. ATM Cell Processor, however, writes the value set in the packet descriptor into this field, as

it does to the CPCS-UU field.

(d) Packet length (Length) field: Indicates the user data length in bytes, in binary notation.

(e) CRC-32 field: The CRC-32 value calculated for the range from the user data to the end of the Length field

is set in this field. Generation polynomial is following

G (x) = 1 + x + x

2

+ x

4

+ x

5

+ x

7

+ x

8

+ x

10

+ x

11

+ x

12

+ x

16

+ x

22

+ x

23

+ x

26

+ x

32

4.1.3.2 ATM layer function

(1) Traffic classes

ATM Cell Processor supports 3 traffic classes; CBR (Constant Bit Rate), VBR (Variable Bit Rate) and UBR

(Undefined Bit Rate).

(2) Generation a cell

ATM Cell Processor generates a cell by adding 5 bytes header to the segment as the figure shown below.