NEC Network Controller uPD98502 User Manual
Page 385
CHAPTER 7 PCI CONTROLLER
Preliminary User’s Manual S15543EJ1V0UM
385
7.3.4.2 Transition by power management event
The sequence is as follows:
1.
When Power Management Event occurs, the V
R
4120A writes a ‘1’ to PMERQ bit in P_PPCR register.
2.
The PCI Controller asserts PME_B if PME_En bit in PMCSR register is enabled.
3.
An external PCI-Host device writes a ‘1’ to PME_Status bit in PMCSR register or writes a ‘0’ to PME_En bit in
PMCSR register in order to clear PME_B.
4.
The PCI Controller deasserts PME_B.
Hereafter, as same case of the transition is issued by PCI-Host.
Figure 7-11. The Sequence of the Transition by PME
S am e with the c ase th at P C I-H ost reque sts the trans ition o f the p ower state
clea r P M E #
by w riting '1' to P M E _ S tatus
bit in P M C S R re gister
or b y m ak ing P M E _E n bit '0 '
in P M C S R regis ter dis abled
ass ert P M E #
if P M E _E n bit in P M C S R
reg ister is enab led
dea ssert P M E #
write '1' to P M E R Q
in P P C R registe r
write
write
P C I-H ost
P C I
C ontroller
Internal
C ontroller