NEC Network Controller uPD98502 - Manual (Page 210)

CHAPTER 3 SYSTEM CONTROLLER
210 Preliminary User’s Manual S15543EJ1V0UM
3.4.8 SDTSR (SDRAM Type Selection Register)
The SDRAM type selection register “SDTSR” is a read-write and 32-bit word-aligned register. SDTSR is used to
setup the type of SDRAM. SDTSR is initialized to 0 at reset and contains the following fields:
Bits Field R/W Default Description
31:10 Reserved R/W 0 Hardwired to 0.
Total SDRAM size: 9:8 SDS R/W 00
00 = 4 MBytes (default)
01 = 8 MBytes
10 = 16 MBytes
11 = 32 MBytes
003F_FFFFH – 0000_0000H
007F_FFFFH – 0000_0000H
00FF_FFFFH – 0000_0000H
01FF_FFFFH – 0000_0000H
7 BTM R/W 0 Number of bank:
0 = 1 or 2 banks (default)
1 = 3 or 4 banks
6:4 RAB R/W 000 Total number of SDRAM address bits (RAS + CAS) (except bank select
pins):
000 = 17 bits (default)
001 = 18 bits
010 = 19 bits
011 = 20 bits
100 = 21 bits
101 = 22 bits
110 = reserved
111 = reserved
3:2 Reserved R/W 0 Hardwired to 0.
1:0 CAB R/W 00 Number of column address bits (except bank select pins):
00 = 7 bits (default)
01 = 8 bits
10 = 9 bits
11 = 10 bits
Remark Don’t set the reserved value to each field in this register.