NEC Network Controller uPD98502 - Manual (Page 27)

CHAPTER 1 INTRODUCTION
Preliminary User’s Manual S15543EJ1V0UM 27
1.5.2 IBUS
The IBUS is a 32-bit, 66-MHz high-speed on-chip bus, which enables interconnection each controller blocks.
The IBUS supports the following bus protocols;
• Single read/write transfer
• Burst read/write transfer
• Slave lock
• Retry and disconnect
• Bus parking
Figure 1-4. Block Diagram of IBUS
System
Controller
ATM Cell
Processor
Ethernet
Controller
#1, #2
USB
Controller
PCI
Controller
IBUS
IBUS
arbiter
IBUS
Master
I/F
IBUS
Slave
I/F
decoder
IBUS
MUX
BUS MASTER
BUS SLAVE
(Using MUX Bus Arrangement)
IBUS Interface Block