Bgezal, Branch on greater than or equal to zero and link – NEC Network Controller uPD98502 User Manual
Page 451
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Preliminary User’s Manual S15543EJ1V0UM
451
BGEZAL
Branch On Greater Than Or Equal To Zero And Link
BGEZAL
rs
REGIMM
0 0 0 0 0 1
BGEZAL
1 0 0 0 1
offset
31
26 25
21 20
16 15
0
6
5
5
16
Format:
BGEZAL rs, offset
Description:
A branch target address is computed from the sum of the address of the instruction in the delay slot and the 16-bit
offset, shifted left two bits and sign-extended. Unconditionally, the address of the instruction after the delay slot is
placed in the link register,
r31. If the contents of general register rs are zero or greater when compared to zero,
then the program branches to the target address, with a delay of one instruction.
General register
rs may not be general register r31, because such an instruction is not restartable. An attempt to
execute this instruction is not trapped, however.
Operation:
32
T:
target
← (offset
15
)
14
|| offset || 0
2
condition
← (GPR [rs]
31
= 0)
GPR [31]
← PC + 8
T+1: if condition then
PC
← PC + target
endif
64
T:
target
← (offset
15
)
46
|| offset || 0
2
condition
← (GPR [rs]
63
= 0)
GPR [31]
← PC + 8
T+1: if condition then
PC
← PC + target
endif
Exceptions:
None