Dsubu, Doubleword subtract unsigned – NEC Network Controller uPD98502 User Manual
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APPENDIX A MIPS III INSTRUCTION SET DETAILS
494
Preliminary User’s Manual S15543EJ1V0UM
DSUBU
Doubleword Subtract Unsigned
DSUBU
rs
SPECIAL
0 0 0 0 0 0
rt
rd
0
0 0 0 0 0
DSUBU
1 0 1 1 1 1
31
26 25
21 20
16 15
11 10
6 5
0
6
5
5
5
5
6
Format:
DSUBU rd, rs, rt
Description:
The contents of general register
rt are subtracted from the contents of general register rs to form a result. The
result is placed into general register
rd.
The only difference between this instruction and the DSUB instruction is that DSUBU never traps on overflow. No
integer overflow exception occurs under any circumstances.
This operation is defined in 64-bit mode or in 32-bit kernel mode. Execution of this instruction in 32-bit user or
supervisor mode causes a reserved instruction exception.
Operation:
64
T:
GPR [rd]
← GPR [rs] − GPR [rt]
Exceptions:
Reserved instruction exception (32-bit user mode/supervisor mode)