NEC Network Controller uPD98502 - Manual (Page 29)

CHAPTER 1 INTRODUCTION
Preliminary User’s Manual S15543EJ1V0UM 29
1.5.4 ATM cell processor
By using NEC proprietary 32-bit controller, we will realize ATM Cell processor Unit. ATM Cell processing by
firmware realizes more flexibility than before.
Features of ATM Cell Processor are as follows;
• Realize software SAR function by using 32-bit RISC controller (76 MIPS @66 MHz)
• Firmware is downloaded from external memory to Instruction Cache
• Supports 64 VCs
• Supports UTOPIA level 2 (including management interface) as PHY layer interface
• Supports processing AAL2, AAL5, Raw cell (AAL0) and F5 OAM cells
• Supports 3 service classes (CBR, VBR, UBR)
• Supports up to 50 Mbps Cell speed together with upstream and downstream
• Supports fine grain ATM cell shaping in 1cell/sec granularity on per VC basis
Figure 1-6. Block Diagram of ATM Cell Processor
ATM Cell Processor
IBUS Controller
IBUS Controller
SAR
Registers
SAR
Registers
UTOPIA2-I/F
(DATA)
UTOPIA2-I/F
(DATA)
UTOPIA
BUS
Controller
UTOPIA
BUS
Controller
IBUS
UTOPIA2-I/F
(MANAGE)
UTOPIA2-I/F
(MANAGE)
UTOPIA2
DATA
RAM
DATA
RAM
RISC Core
RISC Core
I CACHE
IRAM
I CACHE
IRAM
WORK
RAM
WORK
RAM
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