Jump – NEC Network Controller uPD98502 User Manual
Page 497
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Preliminary User’s Manual S15543EJ1V0UM
497
J
Jump
J
J
0 0 0 0 1 0
target
31
26 25
0
6
26
Format:
J target
Description:
The 26-bit target address is shifted left two bits and combined with the high-order four bits of the address of the
delay slot. The program unconditionally jumps to this calculated address with a delay of one instruction.
Operation:
32
T:
temp
← target
T+1: PC
← PC
31..28
|| temp || 0
2
64
T:
temp
← target
T+1: PC
← PC
63..28
|| temp || 0
2
Exceptions:
None