NEC Network Controller uPD98502 - Manual (Page 299)

CHAPTER 5 ETHERNET CONTROLLER
Preliminary User’s Manual S15543EJ1V0UM 299
5.2.35 En_MSR (Mask Serves Register)
Each interrupt source is maskable. En_MSR register shows which interrupts are enable.
Default value is all “0” which means all interrupt sources are disable.
Bits Field R/W Default Description
31:16 Reserved R/W 0 Reserved for future use. Write 0s.
15 XMTDN R/W 0 Transmit Done
14 TBDR R/W 0 Transmit Buffer Descriptor Request at Null
13 TFLE R/W 0 Transmit Frame Length Exceed
12 UR R/W 0 Underrun
11 TABR R/W 0 Transmit Aborted
9:8 Reserved R/W 0 Reserved for future use. Write 0s.
10 TCFRI R/W 0 Control Frame Transmit
7 RCVDN R/W 0 Receive Done
6 RBDRS R/W 0 Receive Buffer Descriptor Request at alert level
5 RBDRU R/W 0 Receive Buffer Descriptor Request at zero
4 OF R/W 0 Overflow
3 LFAL R/W 0 Link Failed
2:1 Reserved R/W 0 Reserved for future use. Write 0s.
0 CARRY R/W 0 Carry Flag:
CARRY indicates an overflow of the statistics counters