NEC Network Controller uPD98502 - Manual (Page 181)

CHAPTER 2 V R 4120A
Preliminary User’s Manual S15543EJ1V0UM 181
Figure 2-86. Writeback & Refill Flow
EOD ?
Yes
No
Write-back
to memory
EOD ?
Refill Start
Write data
to cache
Error bit
OK
Bus Error Exception
Cache line
Invalid
Yes
Error
No
Remark Write-back Procedure:
On a store miss write-back, data tag is checked and data is transferred to the write buffer. If an error is detected in
the data field, the write back is not terminated; the erroneous data is still written out to main memory. If an error is
detected in the tag field, the write-back bus cycle is not issued.
The cache data may not be checked during CACHE operation.
2.7.7 Manipulation of the caches by an external agent
The V
R
4120A does not provide any mechanisms for an external agent to examine and manipulate the state and
contents of the caches.