NEC Network Controller uPD98502 - Manual (Page 532)

APPENDIX A MIPS III INSTRUCTION SET DETAILS
532 Preliminary User’s Manual S15543EJ1V0UM
MTLO
Move To LO
MTLO
rs
SPECIAL
0 0 0 0 0 0
MTLO
0 1 0 0 1 1
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31 26 25 21 20 6 5 0
6 5 6 15
Format:
MTLO rs
Description:
The contents of general register rs are loaded into special register LO.
If an MTLO operation is executed following a MULT, MULTU, DIV, or DIVU instruction, but before any MFLO,
MFHI, MTLO, or MTHI instructions, the contents of special register LO are undefined.
Operation:
32, 64 T-2: LO ← undefined
T-1: LO ← undefined
T: LO ← GPR [rs]
Exceptions:
None