NEC Network Controller uPD98502 - Manual (Page 498)

APPENDIX A MIPS III INSTRUCTION SET DETAILS
498 Preliminary User’s Manual S15543EJ1V0UM
JAL
Jump And Link
JAL
JAL
0 0 0 0 1 1
target
31 26 25 0
6 26
Format:
JAL target
Description:
The 26-bit target address is shifted left two bits and combined with the high-order four bits of the address of the
delay slot. The program unconditionally jumps to this calculated address with a delay of one instruction. The
address of the instruction after the delay slot is placed in the link register, r31. The address of the instruction
immediately after a delay slot is placed in the link register (r31). When a MIPS16 instruction can be executed, the
value of bit 0 of r31 indicates the ISA mode bit before jump.
Operation:
32 T: temp
← target
If MIPS16En = 1 then
GPR[31]
← (PC+8)
31..1 || ISA MODE
else
GPR[31] ← PC+8
endif
T+1: PC ← PC
31..28 || temp || 0
2
64 T: temp ← target
If MIPS16EN = 1 then
GPR[31] ← (PC+8)
63..1 || ISA MODE
else
GPR[31] ← PC+8
endif
T+1: PC ← PC
63..28
|| temp || 0 2
Exceptions:
None