NEC Network Controller uPD98502 - Manual (Page 145)

CHAPTER 2 V R 4120A
Preliminary User’s Manual S15543EJ1V0UM 145
2.5.4.4 Cold reset exception
(1) Cause
The Cold Reset exception occurs when the ColdReset_B signal (internal) is asserted and then deasserted. This
exception is not maskable. The Reset_B signal (internal) must be asserted along with the ColdReset_B signal (for
details, see Section 2.6 Initialization Interface).
(2) Processing
The CPU provides a special interrupt vector for this exception:
— BFC0_0000H (virtual address) in 32-bit mode
— FFFF_FFFF_BFC0_0000H (virtual address) in 64-bit mode
The Cold Reset vector resides in unmapped and uncached CPU address space, so the hardware need not
initialize the TLB or the cache to process this exception. It also means the processor can fetch and execute
instructions while the caches and virtual memory are in an undefined state.
The contents of all registers in the CPU are undefined when this exception occurs, except for the following register
fields:
• While the ERL of Status register is 0, the PC value at which an exception occurs is set to the ErrorEPC
register.
• TS and SR bits of the Status register are cleared to 0.
• ERL and BEV bits of the Status register are set to 1.
• The Random register is initialized to the value of its upper bound (31).
• The Wired register is initialized to 0.
• Bits 31 to 28 and bits 22 to 3 of the Config register are set to fixed values.
• All other bits are undefined.
(3) Servicing
The Cold Reset exception is serviced by:
• Initializing all processor registers, coprocessor registers, TLB, caches, and the memory system
• Performing diagnostic tests
• Bootstrapping the operating system