Index – Motorola MPC8260 User Manual
Page 994
Index-14
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
INDEX
PPC_ALRH (60x bus arbitration high-level
PPC_ALRL (60x bus arbitration low-level
Programming examples
serial communications controllers (SCCs)
GSMR (general SCC mode register)
HDLC bus protocol, 21-23
PSMR (protocol-specific mode register)
TODR (transmit-on-demand register)
transparent mode, 23-13
UART mode, 20-22
transparent mode
NMSI programming example, 26-29
Promiscuous mode, see Transparent mode
Promiscuous operation, 32-1
PSDMR (60x SDRAM mode register), 10-21
PSMR (protocol-specific mode register)
AppleTalk mode, 25-4
BISYNC mode, 22-10
Ethernet mode, 24-15
HDLC bus protocol, programming, 21-23
HDLC mode, 21-7
overview, 19-9
transparent mode, 23-9
UART mode, 20-13
PSORx (port special options registers), 35-4
PSRT (60x bus-assigned SDRAM refresh timer)
Pulse width modulation (PWM) channels, 13-19
PURT (60x bus-assigned UPM refresh timer)
PWM channels (pulse width modulation
R
RAM word, 10-70
RCCR (RISC controller configuration register), 13-7
Registers
AppleTalk mode
GSMR, 25-3
PSMR, 25-4
TODR, 25-4
ATM controller
FCCE, 29-87
FCCM, 29-87
FPSMR (FCC protocol-specific mode
FTIRRx, 29-88
GFMR register, 29-85
BISYNC mode
BDLE, 22-8
BSYNC, 22-7
PSMR, 22-10
SCCE, 22-15
SCCM, 22-15
SCCS, 22-16
communications processor (CP)
RCCR, 13-7
RTSCR, 13-9
RTSR, 13-10
communications processor module (CPM)
CPCR, 13-11
parallel I/O ports
PDATx, 35-2
PDIRx, 35-3
PODRx, 35-2
PPAR, 35-4
PSORx, 35-4
CPM multiplexing
CMXFCR, 15-12
CMXSCR, 15-14
CMXSI1CR, 15-10
CMXSI2CR, 15-11
CMXSMR, 15-17
CMXUAR, 15-7
DSR
overview, 19-9
UART mode, 20-11
fast communications controllers (FCCs)
Fast Ethernet mode
FCCE, 30-21
FCCM, 30-21
FPSMR, 30-20
HDLC mode
FCCE, 31-14
FCCM, 31-14
FCCS, 31-16
FPSMR, 31-7
overview
FCCEx, 28-14
FCCMx, 28-14
FCCSx, 28-14
FCRx, 28-13
FDSRx, 28-7
FPSMRx, 28-7
FTODRx, 28-7
GFMRx, 28-3
interrupts, 28-13
timing control, 28-15
GSMR
AppleTalk mode, 25-3
overview, 19-3
HDLC mode