Motorola MPC8260 - Manual (Page 817)

29-37 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
core then moves the buffer pointer to the MCC. The bufferÕs data length should not include
the CAS octets.
To optimize the process, the framer may interrupt the core only when the CAS information
changes. (CAS information changes slowly.) The core can keep the CAS block in memory
and connect to the framer only when the CAS changes. The core can use regular read and
write cycles when connecting to the framer through a parallel interface.
The MCC and ATM controller should be synchronized with the framerÕs multi-frame block
boundary. At the ATM side, the structured block size should equal the multi-frame block
size plus the size of the CAS block so that the structured pointer, inserted by the ATM
controller, points to the start of the structured data block. At the MCC side, the MCC must
to be synchronized with the super frame sync signal. This synchronization can be achieved
by external logic that triggers on the super frame sync signal and starts delivering the frame
sync to the MCC. When loss of super frame synchronization occurs, this logic should reset
and trigger again on the next super frame indication.
29.9.7 Trunk Condition
According to the Bellcore standard, the interworking function (IWF) should be able to
transmit special payload on both ATM and TDM channels to signal alarm conditions
(Bellcore TR-NWT-000170). The core can be used to generate the trunk condition payload
in special buffers (or existing buffers) for the ATM controller or MCC.
29.9.8 ATM-to-ATM Data Forwarding
Automatic data forwarding can be used to switch ATM AAL0 cells from one ATM port to
another without core intervention. The ATM receiver and transmitter should be programed
to process the same BD table. When the ATM receiver Þlls an AAL0 buffer, the ATM
transmitter sends it. The ATM receiver and transmitter are synchronized using the same
mechanism as described for ATM-to-TDM automatic forwarding; see Section 29.9.1,
ÒAutomatic Data Forwarding.Ó
29.10 ATM Memory Structure
The ATM memory structure, described in the following sections, includes the parameter
RAM, the connection tables, OAM performance monitoring tables, the APC data structure,
BD tables, the AAL1 sequence number protection table and the UNI statistics table.
29.10.1 Parameter RAM
When conÞgured for ATM mode, the FCC parameter RAM is mapped as shown in
Table 29-11.